Azuro reportedly has said that NXP Semiconductor has adopted its PowerCentric clock-tree synthesis and optimization solution.

 

NXP’s multimarket semiconductor business unit adopted PowerCentric after demonstrating a reduction in clock power while improving the clock timing, according to Azuro officials.

 

NXP is a semiconductor company founded by Philip. The company creates semiconductors, system solutions and software for TVs, set-top boxes, identification applications, mobile phones, cars and a wide range of other electronic devices.

 

Arvind Chopra, design manager at NXP, said that his group faces challenging clock structures that need to be balanced across multiple operating modes.

 

“We are also under constant pressure to reduce power,” Chopra said.

 

He that PowerCentric is a well-integrated solution that gives the group better timing results and much faster timing closure.

 

“It also provides significant power savings which we found correlated well with actual silicon results,” Chopra said.

 

Azuro’s PowerCentric operates as a complete replacement for clock tree synthesis within digital design flows. It addresses power, timing, and variability within a unified optimization environment.

 

Officials said that PowerCentric brings together algorithms for clock tree buffering, gate-level clock gate logic synthesis, and statistical average-case dynamic power analysis, to deliver a unified clock implementation solution for advanced nanometer designs.

 

The semiconductor company found that PowerCentric’s multi-mode clock balancing capability reduced the time needed to implement the clocks simultaneously across all modes. Also, it produced a tree with smaller insertion delay.

 

Azuro officials said that a critical requirement needed to close the design timing was PowerCentric’s ability to optimize the setup and hold timing concurrently with CTS (News - Alert). The solution achieved its power-savings by adding new clock gates to the design without disturbing the total cell area.

 

Paul Cunningham, co-founder and chief executive officer of Azuro, said that NXP’s products have sophisticated timing schemes that make CTS a key factor in their ability to meet performance goals and market window opportunities.

 

“PowerCentric’s unique technology helps our customers to sharpen their product differentiation and to speed-up their design time,” he said.